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Datasheet TLE 6228 GP
Smart Quad Channel Low-Side Switch
Features Product Summary * Shorted Circuit Protection * Overtemperature Protection * Overvoltage Protection * Parallel Control of the Inputs (PWM Applications) * Seperate Diagnostic Pin for Each Channel * Power - SO 20 - Package with integrated cooling area * Standby mode with low current consumption * C compatible Input * Electrostatic Discharge (ESD) Protection * Green Product (RoHS compliant) * AEC qualified Supply voltage Drain source voltage On resistance Output current VS VDS(AZ)max RON 1,2 RON 3,4 ID 1,2 (max) ID 3,4 (m ax) 4.8 - 32 60 0.23 0.28 2x5 2x3 V V W W A A
Application * All kinds of resistive and inductive loads (relays,electromagnetic valves) * C compatible power switch for 12 and 24 V applications * Solenoid control switch in automotive and industrial control systems * Robotic Controls
PG-DSO-20-65
General description Quad channel Low-Side-Switch (2x5A/2x3A) in Smart Power Technology (SPT) with four separate in puts and four open drain DMOS output stages. The TLE 6228 GP is fully protected by embedded pro tection functions and designed for automotive and industrial applications. Each channel has its own status signal for diagnostic feedback. Therefore the TLE 6228 GP is particularly suitable for ABS or Powertrain Systems. Block Diagram
STBY
GND
VS
ENA
normal function
V BB
IN1 IN2 IN3 IN4 ST1
as Ch. 1
SCB / overload
LOGIC
overtemperature open load/sh. to gnd
as Ch. 1
Output Stage
as Ch. 1
OUT1
1
4 4
ST2 ST3 ST4
as ST 1 as ST 1 as ST 1
Gate Control
OUT4
GND
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Datasheet TLE 6228 GP
Detailed Block Diagram
VS
STBY
internal supply
ENA
Overtemperature Channel 4
Overtemperature Channel 1 Open Load
Overload
IN1 ST1
LOGIC
OUT1
Open Load
IPD
IN4
LOGIC
Overload
OUT4
ST4
Overtemperature Channel 3
Overtemperature Channel 2
Open Load
IPD
IN2 ST2
LOGIC
Overload
OUT2
Open Load
IPD
IN3
LOGIC
Overload
OUT3
ST3
IPD
GND
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Pin Description Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Symbol GND OUT1 ST1 IN4 VS STBY IN3 ST2 OUT2 GND GND OUT3 ST3 IN2 GND ENA IN1 ST4 OUT4 GND Function Ground Power Output channel 1 Status Output channel 1 Control Input channel 4 Supply Voltage Standby Control Input channel 3 Status Output channel 2 Power Output channel 2 Ground Ground Power Output channel 3 Status Output channel 3 Control Input channel 2 Ground Logic Enable Input for all four channels Control Input channel 1 Status Output channel 4 Power Output channel 4 Ground Pin Configuration (Top view) GND OUT1 ST1 IN4 VS STBY IN3 ST2 OUT2 GND 1* 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 GND OUT4 ST4 IN1 ENA GNDL IN2 ST3 OUT3 GND
PG - DSO - 20 - 65
Heat slug internally connected to ground pins
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Datasheet TLE 6228 GP
Maximum Ratings for T j = - 40C to 150C
The maximum ratings may not be exceeded under any circumstances, not even momentarily and individually, as permanent damage to the IC will result.
Parameter Supply voltage Continuous drain source voltage (OUT1...OUT4) Input voltage IN1 to IN4, ENA Input voltage STBY Status output voltage Load Dump Protection VLoad Dump = UP+US; UP=13.5 V RI1)=2 W; td=400ms; IN = low or high With RL= 5 W for Ch. 1,2; 10 W for Ch. 3,4 (ID = 2,7A respectively 1,35A) Operating temperature range Storage temperature range Output current per channel (see page 6) Status output current Inductive load switch off energy (single pulse) Tj = 25C Electrostatic Discharge Voltage (human body model) according to MIL STD 883D, method 3015.7 and EOS/ESD assn. standard S5.1 - 1993 DIN Humidity Category, DIN 40 040 IEC Climatic Category, DIN IEC 68-1 Thermal resistance junction - case (die soldered on the frame) junction - ambient @ min. footprint junction - ambient @ 6 cm2 cooling area
Symbol VS VDS VIN , VENA VSTBY VST VLoad Dump
2)
Values -0.3 ... + 40 45 - 0.3 ... + 6 - 0.3 ... + 40 - 0.3 ... + 32 55
Unit V V V V V
Tj Tstg ID(lim) IST EAS VESD
- 40 ... + 150 - 55 ... + 150 ID(lim) min - 5 ... + 5 50 2000
C A mA mJ V
E 40/150/56 K/W RthJC RthJA 2 50 38
Minimum footprint
PCB with heat pipes, backside 6 cm2 cooling area
1 2
) R =internal resistance of the load dump test pulse generator LD200 I )V LoadDump is setup without DUT connected to the generator per ISO 7637-1 and DIN 40 839. Page 4 2010-07-10
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Datasheet TLE 6228 GP
Electrical Characteristics
Parameter and Conditions VS = 4.8 to 18 V ; Tj = - 40 C to + 150 C (unless otherwise specified) 1. Power Supply (VS) Supply current (Outputs ON) Supply current (Outputs OFF) VENA = L, VSTBY = H Standby current Operating voltage 2. Power Outputs ON state resistance Channel 1,2 ID = 1A; VS 9.5 V ON state resistance Channel 3,4 ID = 1A; VS 9.5 V Z-Diode clamping voltage (OUT1...4) Pull down current Output leakage current
4 3
Symbol
Values min
Unit typ max
IS IS VSTBY = L IS VS Tj = 25 C Tj = 150C Tj = 25 C Tj = 150C ID 100 mA VSTBY = H, VIN = L 4.8
8 4 10 32
mA mA A V
RDS(ON) RDS(ON) VDS(AZ) IPD IDlk ton toff tfall trise tDSO tD tD-failure tD-IN tfOL(off) 3 3 3 3 20 500 500 500 10 45 10
0.23 0.28
0.26 0.5 0.4 0.75 60 50 5 50 60 30 30 100 3000 3000 3000 100
W W V A A s
20 15 20 10 5 60 1200 1200 1200 30
VSTBY = L, 0V VDS 20V ID = 1 A ID = 1 A ID = 1 A ID = 1 A
Output turn on time Output turn off time 4 Output on fall time 4 Output off rise time 4 Overload switch-off delay time 4 Output off status delay time 4 Failure extension Time for Status Report Input Suppression Time Open Load (off) filtering Time 5 3. Digital Inputs (IN1, IN2, IN3, IN4, ENA) Input low voltage Input high voltage Input voltage hysteresis Input pull down current Enable pull down current
5
VINL VINH VINHys VIN = 5 V; VS 6.5 V VENA = 5 V; VS 6.5 V IIN IENA
- 0.3 2.0 50 10 10 200 30 20
1.0 6.0 60 40
V V mV A A
4. Digital Status Outputs (ST1 - ST4) Open Drain Output voltage low Leakage current high IST = 2 mA VSTL ISTH 0.5 2 V A
3 4
If the output voltage exceeds 35V, this current (zener current of a internal structure) can rise up to 1mA See timing diagram, resistive load condition; VS 9 V 5 This parameter will not be testet but assured by design V4.1 Page 5 2010-07-10
Datasheet TLE 6228 GP
Electrical Characteristics
Parameter and Conditions VS = 4.8 to 18 V ; Tj = - 40 C to + 150 C (unless otherwise specified) 5. Standby Input (STBY) Input low voltage Input high voltage Input current 6. Diagnostic Functions Open load detection voltage VENA = X, VIN = L Open load detection current channel 1,2 VENA = VIN = H Open load detection current channel 3,4 VENA = VIN = H Overload detection current channel 1,2 Overload detection current channel 3,4 Overtemperature shutdown threshold Hysteresis
5
Symbol
Values min
Unit typ max
VSTBY VSTBY VSTBY = 18 V ISTBY VS 6.5 V VS 6.5 V VS 6.5 V VS 6.5 V VS 6.5 V
0 3.5
1 VS 300
V V A
VDS(OL) ID(OL) 1,2 ID(OL) 3,4 ID(lim) 1,2 ID(lim) 3,4 Tth Thys tIN
0.3*VS 0.33*VS 0.36*VS 100 100 5 3 170 10 500 160 160 7.5 5.5 200 250 250
V mA mA A A C K s
Pulse Width for static diagnostic output
5
This parameter will not be tested but assured by design Page 6 2010-07-10
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Datasheet TLE 6228 GP
Application Description
This IC is especially designed to drive inductive loads (relays, electromagnetic valves). Integrated clamp-diodes limit the output voltage when inductive loads are discharged. Four open-drain logic outputs indicate the status of the integrated ciruit. The following conditions are monitored and signalled: - overloading of output (also shorted load to supply) in active mode - open and shorted load to ground in active and inactive mode - overtemperature
Circuit Description
Input Circuits The control and enable inputs, both active high, consist of schmitt triggers with hysteresis. All inputs are provided with pull-down current sources. Not connected inputs are interpreted as low and the respective output stages are switched off. In standby mode (STBY = LOW ) the current consumption is greatly reduced. The circuit is active when STBY = HIGH. If the standby function is not used, it is allowed to connect the standby pin directly to VS. Status Signals: The status signals are undefined for 2ms after a power up event or a STBY low to high transition. Output Stages The four power outputs consist of DMOS-power transistors with open drains. The output stages are short circuit protected throughout the operating range. Each output has it's own zenerclamp. This causes a voltage limitation at the power transistor when inductive loads are switched off. Parallel to the DMOS transistors there are internal pull down current sources. They are provided to de tect an open load condition in the off state. They will be disconnected in the standby mode. Due to EMI measures there is an internal zenerclamp in parallel to the output stage. It gets active above 33V drain source voltage. This leads to an increasing leakage current up to 1 mA @ VDS = 40V. Protective Circuits The outputs are protected6) against current overload and overtemperature. If the output current i n creases above the overload detection threshold I O for a longer time then tDSO or the temperature in Q creases above Tth, then the power transistor is immediately switched off. It remains off until the control signal at the input is switched off and on again.
Fault Detection The status outputs indicate the switching state of the output stage. Under normal conditions is: ST = low Output off; ST = high Output on. If an error occurs, the logic level of the status output is inverted, as listed in the diagnostic table.
6)
The integrated protection functions prevent an IC destruction under fault conditions and may not be used in normal operation or permanently. Page 7 2010-07-10
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Datasheet TLE 6228 GP
If current overload or overtemperature occurs for a longer time than tDSO, the fault condition is latched into an internal register and the output is shutdown. The reset is done by switching off the corresponding control input for a time longer than tD-IN. Open load is detected for all four channels in on and off mode. In the on mode the load current is monitored. If it drops below the specified threshold value IQU then an open load condition is detected. In the off mode, the output voltage is monitored. An open load condition is detected when the output voltage of a given channel is below the threshold VDS(OL), which is typ. 33 % of the supply voltage VS. To prevent an open load diagnosis in case of transient Voltages on the outputs the open load detection in off mode uses a filter of typ. 50s. Status output at pulse width operation If the input is operated with a pulsed signal, the status does not follow each single pulse of the input sig nal. An internal delay tD of typ. 1.2ms ( min 500 ms) enables a continuous status output signal. See the timing diagrams on the following pages for further information. This internal status delay simplifies diagnostic software for pwm applications.
Diagnostic Table
In general the status follows the input signal in normal operating conditions. If any error is detected the status is inverted.
Operating Condition Standby1) Normal function
Standby Input STBY L H H H H H H H H H H
Enable Input ENA X L H H L L H H H H L H H L
Control Input IN X X L H L H L H H HfiL X H HfiL X
Power Output Q off off off ON off off off ON off off off off off off
Status Output ST H L L H H H H L L L L L L L
Open load or short to ground
Overload or short to supply2) reset latch 3) Overtemperature2) reset latch 3)
H H H
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Note 1) : Standby is not designed for switching or PWM operation of the outputs Note 2) : overload/short-to-supply/overtemperature - events shorter than min. time tDSO specified in 2.10 will not be latched and not reported at the status pin. Note 3) : to reset latched status-output in case of overload/short-to-supply/overtemperature the control input has to go low and stay low for longer than max. input suppression time tD-IN specified in 2.13 of the characteristics
Failure Situations and Status Report Logic Block Diagram
Overtemperature 1.....overtemperature 0.....normal cond.
Gate Driver 1... Output On 0... Output Off
ENA 1....enabled 0... disabled Input 1....On 0... Off IN Delay D
SET
tD
tDSO Delay 60s S Q
OUT
1,2ms typ.
R
Overload 0.....overload 1.....normal cond.
CLR
Q
Delay 60s IN OUT tD
60s typ.
tD t D-IN when overload occured EN IN HI
Delay D
OUT Status 0....High 1....Low
Open load "off" 1.....open load 0.....normal cond.
Filter 30s Filter tD-failure
EN IN
Delay D
OUT
Open load "on" 0.....open load 1.... normal cond.
EN IN t D-failure
Delay D
OUT
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Timing Diagrams
Output Slope
VIN VI NH
VINL t VDS
VS 85%
t on
t off
15%
t tf tr
V ST
tD
t
Fig. 1
Overload Switch OFF Delay
ID ID(lim) ID(OL)
t t DSO
VST
t D-failure
t
Fig. 2
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VD = 5V
VS
Test Circuit
10k
IVS
10k
10k
10k
R L4
R L3
R L2 RL1
ST1
IST1 ID1
VS ST1
IST2
OUT1
OUT1
ST2 ST2
IST3 ID2
ST3 ST3
IST4
OUT2
OUT2
ST4 ST4
ID3 IIN1
IN1 IN1
IIN2
OUT3
TLE 6228 GP
OUT3
Page
IN2 IN2 IN3
IIN3
TLE 6227
ID4
11
OUT4
IN3 IN4 IN4 ENA STBY
VSTBY IIN4
OUT4
ENA
VIN2 VIN3 VIN4 VENA ISTBY
IENA
VDS(OUT4) VDS(OUT3) VDS(OUT2) VDS(OUT1)
VST1 VST2
VST3 VST4 VIN1
Datasheet TLE 6228 GP
GND
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Application Circuit
VD = 5V
10k 10k 10k 10k C
L1
L2
L3
L4
Status Output
Page
STBY VS ST1 OUT1 ST2 ST3 ST4 TLE OUT2
+12V
12
6228 OUT3
OUT4
Control Inputs ENA GND
IN1 IN2 IN3 IN4
Enable Input
Datasheet TLE 6228 GP
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Datasheet TLE 6228 GP
The blocking capacitor C is recommended to avoid critical negative voltage spikes on VS in case of bat tery interruption during OFF-commutation.
Timing Diagrams of Diagnostic with Pulsed Input Signal
Normal condition, resistive load, pulsed input signal
V
IN t IN
ID
V ST tD tD
Fig. 3
Current Overload
F tINoff V IN I D(lim) ID current overload condition
V ST t DSO
tD-IN
t DSO
tINoff < tD-IN : Input suppression time avoids a restart after overtemperature Fig. 4
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Diagnostic status output at different open load current conditions
V IN
ID t D-failure V ST
I D(OL)
tD
Fig. 5
V
IN tINoff
ID tD-failure V ST tD
I D(OL)
tINOFF < tD leads to a static status signal
Fig. 6
V
IN tINoff I D(OL)
ID tD-failure tD-failure tD tD-failure
V ST
tINoff > tD : Intermittend status signal
Fig. 7
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Normal operation, followed by open load condition
~ 55V
Open load voltage condition
VDS 12V 33%
VIN I D(OL)
ID
tD-failure
tfOL(off)
VST
tD
tD-failure
Fig. 8
Overtemperature
Overtemperature
VIN
tINoff > tD-IN
I D(OL) ID
tD-failure tD-failure
Reset of overload Flip Flop
VST
t
DSO
Fig. 9
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Typical electrical Characteristics Drain-Source on-resistance
RDS(ON) = f (Tj ) ; Vs = 9,5V
Typical Drain- Source ON-Resistance
0,45
Channel 1, 2 Channel 3, 4
0,4
RDS(ON) [Ohm]
0,35
0,3
0,25
0,2
0,15 -50
-25
0
25
50 Tj[C]
75
100
125
150
175
Figure 6 :
Typical ON Resistance versus Junction-Temperature Channel 1-4
Output Clamping Voltage
VDS(AZ) = f (Tj ) ; ID = 100mA
Typical Clamping Voltage
55 54 53
Channel 1-4
VDS (AZ) [V]
52 51 50 49 48 -50
-25
0
25
50 Tj[C]
75
100
125
150
175
Figure 7 :
Typical Clamp Voltage versus Junction-Temperature Channel 1-4
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Package
all dimensions in mm PG - DSO - 20 - 65
15.74 + /- 0. 1 13.7 -0.2
9 x 1.27 = 11.43 1 .2 7 0.4
+ 0 .13
0.25 M
A
20
11
3.2 + /- 0.1
1
1 x 45
10
PIN 1 IN D EX M A R KIN G
A
15.9
+/ -0 .15
1.2 0.1
-0.3
8
2.8 8 8
6.3
8
11 14.2 + / -0 .3
+/ -0 .15 1)
Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with gov ernment regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
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Revision History
Version Date Changes V3.2 V4.0: 2007-06-06: Version Change to Green Product V4.0 2007-06-06 Revision history implemented V4.0 2007-06-06 IFX Logo updated V4.0 2007-06-06 Package name according green nomenclature changed from P-DSO-20-12 to PG-DSO-20-37 V4.0 2007-06-06 Ordering Code removed V4.0 2007-06-06 Package Picture in front page up-dated V4.0 2007-06-06 Added in feature list: * Green Product (RoHS compliant) * AEC qualified V4.0 2007-06-11 Green and AEC logo added V4.0 2007-06-11 Disclaimer re-newed V4.1 2010-07-10 Due to Cu wire bonding, package name changed from PG-DSO-20-37 to PG-DSO-20-65
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Datasheet TLE 6228 GP
Edition 2010-07-10 Published by Infineon Technologies AG 81726 Munich, Germany
(c) 2010 Infineon Technologies AG
All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regard ing the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the ex press written approval of Infineon Technologies, if a failure of such components can reasonably be ex pected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to as sume that the health of the user or other persons may be endangered.
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